Showing posts with label mtech. Show all posts
Showing posts with label mtech. Show all posts

Monday, September 30, 2013

JNTU-KAKINADA : Academic Calender for M.Tech & M.Pharmacy I & II Sem (2012 Batch)

JNTU-KAKINADA : Academic Calender for M.Tech & M.Pharmacy I & II Sem (2012 Batch)

The proposed Academic Calendar for M.Tech (All Courses) & M. Pharmacy (All Courses) I and II Semesters (2012 Admitted Batch) is detailed below.
I Semester (2012 Admitted Batch)
Description From To Weeks
Commencement of Class Work 26-11-2012 - -
I Unit of Instructions 26-11-2012 26-01-2013 9W
I Mid Examinations 28-01-2013 02-02-2013 1W
II Unit of Instruction 04-02-2013 30-03-2013 8W
II Mid Examination 01-04-2013 06-04-2013 1W
Preparation & Practical’s 08-04-2013 13-04-2013 1W
End Examinations 15-04-2013 27-04-2013 2W


II Semester (2012 Batch)

Description From To Weeks
Commencement of Class Work 29-04-2013 - -
I Unit of Instructions 29-04-2013 11-05-2013 2W
Project & Preparation(Vacation) 13-05-2013 22-06-2013 6W
I Unit of Instructions Continuation 24-06-2013 03-08-2013 6W
I Mid Examinations 05-08-2013 10-08-2013 1W
II Unit of Instructions 12-08-2013 05-10-2013 8W
II Mid Examinations 07-10-2013 12-10-2013 1W
Preparations & Practical’s 14-10-2013 19-10-2013 1W
End Examinations 21-10-2013 02-11-2013 2W
Commencement of Project Work 11-11-2013

 

source: jntu world

 




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PGECET 2013 College Wise Allotments

PGECET 2013 College Wise Allotments

Tuesday, September 3, 2013

DSP Processors and Architectures

DSP Processors and Architectures
M.Tech. JNTU, JNTUK, JNTUA

Important Questions

1.      Interpolation, Decimation p21
2.      Explain Digital Filters with Block Diagram p14
3.      Explain In Detail DSP Computational Errors In Detail p52
4.      Explain Dynamic Range and Precision in DSP Systems p47
5.      Explain Parallelism and Pipelining p96-97
6.      Program Abilities and Program Execution p91
7.      Commercial Digital Signal Processing Devices p107
8.      Program Control Unit of TMS320C54XX p93

1.      Explain how signal processed; explain advantages and various categories of DSP
2.      Frequency domain representation of LTI systems p12
3.      With suitable example explain number formats for signals and coefficients in DSP p42
4.      Notes on compensating filter with suitable analysis p57
5.      Instructions of TMS320C54XX process with suitable examples p132
6.      Explain pipeline operation of TMS320C54XX processor with example p148
7.      Explain basic operations in converting a digital signal to analog signal p7
8.      Function of compensating filter p57
9.      Draw the block diagram of circular addressing mode for TMS320C54XX processor explain its operation p85-87
10.  Find address mode and source operand
               I.     add*ar2,a
            II.     read a*ar2
          III.     add *ar2+%a
         IV.     add #offh,a

SELECTED QUESTIONS
               1.a. Decimation and interpolation
2.a. Dsp computational errors
b. Dynamic range and precision in dsp sys
3.a. Programmability and prog. Execution
b. Parallelism and pipelining
4.b. Prog control unit of tms320c54x
7.b. Pipeline operation of tms320c54x processor wt example
9.b. Identify the addresing mode of source operand in each of following,
i. ADD *AR2, A
ii. READ A *AR2
iii. ADD *AR2+%, A
iv. ADD #0FFh, A

 all page nos in dsp processors and arch. avtar singh txt book


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