DSP Processors and Architectures

DSP Processors and Architectures

M.Tech. JNTU, JNTUK, JNTUA

Important Questions

1.      Interpolation, Decimation p21

2.      Explain Digital Filters with Block Diagram p14

3.      Explain In Detail DSP Computational Errors In Detail p52

4.      Explain Dynamic Range and Precision in DSP Systems p47

5.      Explain Parallelism and Pipelining p96-97

6.      Program Abilities and Program Execution p91

7.      Commercial Digital Signal Processing Devices p107

8.      Program Control Unit of TMS320C54XX p93

1.      Explain how signal processed; explain advantages and various categories of DSP

2.      Frequency domain representation of LTI systems p12

3.      With suitable example explain number formats for signals and coefficients in DSP p42

4.      Notes on compensating filter with suitable analysis p57

5.      Instructions of TMS320C54XX process with suitable examples p132

6.      Explain pipeline operation of TMS320C54XX processor with example p148

7.      Explain basic operations in converting a digital signal to analog signal p7

8.      Function of compensating filter p57

9.      Draw the block diagram of circular addressing mode for TMS320C54XX processor explain its operation p85-87

10.  Find address mode and source operand

               I.     add*ar2,a

            II.     read a*ar2

          III.     add *ar2+%a

         IV.     add #offh,a

SELECTED QUESTIONS

               1.a. Decimation and interpolation
2.a. Dsp computational errors
b. Dynamic range and precision in dsp sys
3.a. Programmability and prog. Execution
b. Parallelism and pipelining
4.b. Prog control unit of tms320c54x
7.b. Pipeline operation of tms320c54x processor wt example
9.b. Identify the addresing mode of source operand in each of following,
i. ADD *AR2, A
ii. READ A *AR2
iii. ADD *AR2+%, A
iv. ADD #0FFh, A

 all page nos in dsp processors and arch. avtar singh txt book

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